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RISC-V microcontroller project is open-source


X-FAB Silicon Foundries and EFABLESS Corp. collaborate on the first-silicon availability of the Efabless RISC-V System on Chip (SoC) reference design. This open-source semiconductor project went from design start to tape-out in less than three months using the Efabless design flow based on open-source tools. The mixed-signal SoC, called Raven, is based on the community developed ultra-low power PicoRV32 RISC-V core. Efabless has successfully bench-tested the Raven at 100MHz, and based on simulations the design should be able to operate at up to 150MHz. Raven’s open-source top-level design utilizes X-FAB proprietary analog IP and is created with an open-source design flow. This hybrid open-source design brings the power of open innovation and at the same time protecting significant investment in proprietary IP.


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