Software-based debug solution aids ASIC prototyping

TEKTRONIX Version 2.0 Certus ASIC prototyping debug solution is a suite of software and RTL-based embedded instruments that fundamentally changes the ASIC prototyping flow by enabling full RTL-level visibility and making FPGA internal visibility a feature of the prototyping platform. This simulation-level visibility allows engineers to diagnose multiple defects in a day versus a week or more with existing tools. By using Certus 2.0 to pre-instrument up to one hundred thousand signals per FPGA device, users gain comprehensive RTL-level signal visibility without time consuming synthesis and place and route cycles,

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