Consortium collaborates to advance hearing aid technology
EP&T MagazineElectronics Engineering Wearable Technology aids audio cadence consortium hearing
Industry group develops programmable binaural hearing aid SoC
Cadence Design Systems Inc. has collaborated with a consortium that included GlobalFoundries (GF), Hoerzentrum Oldenburg gGmbH and Leibniz University Hannover to develop the industry’s first binaural hearing aid system-on-chip (SoC) prototype, which is programmable with high-programming languages and enables customers to create hearing aids that process critical sounds more optimally while simultaneously reducing background noise. The SoC, called the Smart Hearing Aid Processor (SmartHeAP), is based on the Cadence Tensilica Fusion G6 DSP and Tensilica Xtensa LX7 processor, the Cadence digital full flow and the GF 22FDX platform. The SmartHeAP project is supported by the German Federal Ministry of Education and Research under grant 16ES0760.
The SmartHeAP SoC prototype provides hearing aid companies with all the components required to create and reprogram hearing devices that improve a wearer’s hearing experience. Some of the key benefits the SmartHeAP SoC prototype provides include:
- Binaural hearing technology:Hearing aids in the right and left ears communicate with one another, enabling a wearer to pick up sounds from the full auditory scene without destroying the binaural cues.
- Improved hearing loss compensation capabilities:Through advanced algorithms, the SoC automatically analyzes the incoming signal and provides adaptive sound amplification that is customized to the wearer’s unique hearing needs.
- High processing capacity with minimal power consumption:Provides the hearing aid wearer with optimal sound quality in real time while conserving power and extending hearing aid battery life.
- Cost Savings: The hearing aid software can be quickly upgraded without replacing the hardware, saving both the wearers and the hearing aid companies money.
- Faster time to market: Hearing aid companies of all sizes can effectively compete in the market due to the ease of use of high-level programming languages, which enable faster innovation cycles.
The Tensilica Fusion G6 DSP was a logical choice for the development of the SmartHeAP SoC because it’s an easy-to-program, multi-purpose DSP that provides low energy consumption, a small footprint, and exceptional out-of-the-box performance.
“Each organization involved brought a unique perspective to the project, and delivering a successful prototype that can make a positive impact on the hearing experience is the ultimate reward,” said Rishi Chugh, vice president, product management in the IP Group at Cadence.
The Tensilica Xtensa LX7 processor is tailored for control-intensive tasks and offers a small footprint, providing added performance, flexibility, and longevity to the design. The Cadence digital full flow enabled a fast path to design closure and better predictability while delivering optimal power, performance and area (PPA). Finally, the GF 22FDX platform provided up to 50% lower power at the same high-performance frequencies (vs. 28nm), enabled by the adaptive body bias (ABB) feature, which is critically important for ultra-low 0.5V VDD or below to reduce power consumption on battery-powered devices, such as hearing aids.