Boundary scan delivers ease-of-use
XJTAG 3.10 JTAG boundary scan test solution enhances ease-of-use by introducing an automated method for dealing with the situation when design updates occur on the board being tested, and a simple way to override the default settings of global variables used by XJEase Device Files. The Board Revisions feature uses an intelligent device-matching algorithm to analyze the new netlist and identify devices that have had reference designators changed. It copies their categorization information to the new project and automatically updates all references to them. If devices have been removed from the circuit, these are highlighted to the user. The matches and suggestions are presented in a user-friendly format that shows the reasons for the suggestions while guiding the user through the updating process. The schematic viewer, layout viewer, and netlist explorer are all utilised to provide the most user-friendly way to present the information the user needs when validating these proposed updates.