Wafer-Level Packaging Symposium
February 15 - February 17, 2021
The development of Advanced Package Technology is undergoing a massive change because Electrical System Architects are directly driving package performance requirements, something which has never happened before. Silicon Architects now have little choice but to push advanced package technologies well beyond their comfort zones. Join us as we address advancements in wafer-level packaging, 3D device packaging, and advanced manufacturing & test technologies. The Wafer-Level Packaging Symposium promises to deliver information at the forefront of packaging technology evolution.
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