Powering up computing capacity
By Arizona State UniversityElectronics Power Supply / Management Engineering engineering power research
Matthew Marinella and Sandia National Laboratories are investigating how to make radiation-hardened computer chips more efficient
When Matthew Marinella left a research role at Sandia National Laboratories to become an associate professor of electrical engineering at Arizona State University, he didn’t leave his Sandia ties behind.
Since joining the faculty of ASU’s Ira A. Fulton Schools of Engineering, Marinella has continued collaborating with Sandia on his research. For example, he’s the principal investigator on a project to increase computing performance through greater power efficiency for radiation-hardened, or “rad-hard,” electronics as part of Sandia’s Grand Challenge series of scientific research. The work at ASU builds on the previous electronics research Marinella conducted at Sandia.
Radiation hardening is a process that increases the durability of electronics used in high-radiation environments like outer space. This can keep crucial computer components, such as those on a spacecraft, functioning where regular electronics would fail under radiation exposure.
Sandia’s Grand Challenge projects are considered high-risk, high-reward and are funded for three years.
“I started at ASU in January 2022, coming from Sandia where we had been working toward a very large project like this for a number of years,” Marinella says. “It finally got funded, so of course we’re hoping this work leads to bigger projects.”
Also involved in this Grand Challenge research are collaborators at the University of California-Berkeley, the University of Texas at Austin and the University of Michigan. The project’s senior management sponsor and strategic customer of the research at Sandia, Rick McCormick, says these institutions’ researchers were brought on board for their expertise in emerging analog computing devices, which are a key part of the project.
Used in radiation-rich environments
To increase computing efficiency for radiation-hardened electronics beyond conventional capabilities, the research team is developing new analog devices that use resistive random-access memory, or ReRAM, and electrochemical random-access memory, or ECRAM. These analog devices will be combined in arrays laid on top of complementary metal-oxide-semiconductor, or CMOS, computer chips manufactured by Taiwan Semiconductor Manufacturing Co.
Once developed, these devices would then be used in radiation-rich environments both in space and on Earth.
“If you’ve seen Chernobyl or someplace like that, you have robots that are trying to go to a place where you don’t want to put people,” Marinella says of Earth-bound uses of the devices.
Satellite cameras are another example of what the increased processing efficiency could do. Satellites’ capabilities are constrained by parameters such as their size, weight and battery power. Making onboard computing more efficient, such as with the technology that Marinella’s team is developing, would free up power for other tasks, including increasing the resolution of satellite photos.
Efficiency-boosting memory chips
Marinella says the Department of Defense has an interest in radiation-hardened computing technology, including for uses such as image processing with edge computing. In edge computing, data is processed in a computer system soon after it’s gathered, resulting in fewer large raw-data files that need to be transferred and speeding up file exchange.
Although these chips are intended to be used in radiation-hardened applications for now, Marinella sees the arrays of efficiency-boosting memory chips, combined with traditional semiconductors, eventually becoming ubiquitous in consumer electronics.
“These would be the chip in your cellphone, autonomous vehicles and cloud computing systems,” he says.
Transfer data between separate elements
According to Sapan Agarwal, the principal investigator for Sandia’s side of this Grand Challenge project, integrating the memory devices with traditional chips will push the boundaries beyond what’s possible with traditional chips alone. Conventional CMOS chips’ processing efficiency is limited by the size and voltage of their transistors.
Agarwal says that one of the key factors slowing down computing with conventional chips is the need to transfer data between separate elements for memory storage and processing. Integrating the team’s new ReRAM and ECRAM devices with CMOS chips will enable processing and memory storage to be done all in one location. According to Agarwal, this will result in computing performance per watt 100 times greater than what is currently possible.
Fin field-effect transistors
McCormick notes that the team will experiment with different analog computing devices, which will help them figure out which one works best for their applications. Marinella is also working on a separate project with Hugh Barnaby, an ASU professor of electrical engineering, to understand radiation effects on transistors known as fin field-effect transistors, or FinFETs, which are more efficient than older, standard node transistors. While this project is also a collaboration with and funded by Sandia, it is distinct from Marinella’s work in the Grand Challenge program focused on integrating CMOS chips with analog device arrays.
Although the Grand Challenge project combining CMOS chips with analog devices won’t use FinFETs for the research, Marinella’s future goal is to use the FinFETs as transistors for the CMOS chips and the integrated analog arrays if the FinFETs prove to tolerate radiation well enough for extreme environments. The more efficient combination would free up even more radiation-hardened computing power, making the system even more efficient than the current Grand Challenge CMOS and analog memory integration project is investigating.
Helping develop key enabling technologies
McCormick says that having Marinella working at ASU, after his great record of innovation and training postdoctoral researchers at Sandia, puts both institutions in an excellent position for research collaboration opportunities.
“Matt has already connected us with other high-impact professors at ASU and maintained strong collaborations with Sandia,” he says. “We look forward to continuing to work with him and have him train up the next generation of Sandia researchers.”
Agarwal concurs that the partnership with ASU is a great opportunity for expanding Sandia’s capabilities for research.
“The team at ASU is a core part of our broader research efforts, helping develop key enabling technologies and partnering with us on our broader emerging microelectronics strategy,” he says. “At ASU, Matt continues to be a critical collaborator.”
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