MIPI update to spec boosts speed, flexibility

The MIPI Allicance, an international organization that develops interface specifications for mobile and mobile-influenced industries, today announced the first update to its publicly available, royalty-free, MIPI I3C Basic specification. Version 1.1.1 dramatically enhances the speed and flexibility of I3C Basic, simplifying development of innovative designs for products such as smartphones, wearables, and systems in automobiles and server environments.

As the successor to the legacy I2C interface, MIPI I3C/I3C Basic provides a scalable, medium-speed, utility and control bus interface for connecting peripherals to application processors, streamlining integration and improving cost efficiencies. The specification uses a two-wire interface and supports in-band interrupts, resulting in a smaller printed circuit board (PCB) footprint compared with other control bus solutions. I3C can be used to integrate a vast array of peripheral devices and sensors to application processors.

Bundles features most commonly needed

Available for implementation without MIPI Alliance membership, I3C Basic is a subset of the full MIPI I3C specification that bundles the features most commonly needed by developers and other standards organizations.

The updated version of I3C Basic provides for extensible use of extra bus lanes to increase the interface speed to nearly 100 MHz, future-proofing the interface for rising speed requirements. The new version includes two High Data Rate (HDR) modes — HDR Double Data Rate (HDR-DDR) and HDR Bulk Transport (HDR-BT) — which are designed to transfer more data at the same bus frequency:

• HDR-DDR with support for common command codes (CCCs) and flow controls doubles the raw data rate to 25 Mbps over a single lane compared with I3C Basic’s Single Data Rate (SDR) mode.
• HDR-BT with CCC support delivers efficient bulk transport of data over up to four lanes. It can enable raw data rates of up to 100 Mbps.

Another feature added to I3C Basic v1.1.1 was standardized target reset, which enhances the specification’s ability to reset a specific peripheral device, enabling better recovery from error conditions. This mechanism allows a controller to reset one or more selected targets and avoid resetting any others; supports different levels of reset, ranging from resetting only an I3C peripheral within a target to resetting the whole target device; and supports I3C’s error-escalation mechanism, including reset of an errant target.

“The new version of I3C Basic is more closely aligned with the core I3C specification so that the mobile ecosystem and broader system-integrator community can more effectively and efficiently implement it within an ever-greater variety of applications,” said Joel Huloux, chairman of MIPI Alliance. “With these updates, we continue to strengthen the upgrade path from I2C and advance I3C as the universal utility and control bus.”