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Cadence enters strategic alliance with NI

Agreement seeks to enhance electronic system innovation


National Instruments Corp. and Cadence Design Systems Inc. announced a system innovation strategic alliance to create an integrated design to test flow, leveraging reusable data and test IP from electronics design and verification to validation and production test for electronic system and semiconductor companies. 

This strategic alliance builds upon the broad-ranging collaboration that National Instruments (NI) and Cadence initiated in 2018 to improve the overall semiconductor development and testing of next-generation wireless, automotive and mobile integrated circuits (ICs) and modules. Through the strategic alliance agreement, NI and Cadence expect the joint development of technology, methodology and intellectual property to streamline electronics development.

The objective is to provide customers with a seamless flow from pre-silicon development to post-silicon test, leveraging design, verification and analysis data between Cadence and NI technologies. The collaboration is anchored in analog, mixed-signal and RF integrations around the Cadence Virtuoso and Spectre platforms, and physical data from the NI LabVIEW and PXI modular instrumentation systems, which customers can use to enhance system design via a comprehensive flow from concept to volume production to help them achieve faster time to market and lower overall costs.

Aim to shorten the overall time to electronic product creation

“The rapid product expansion in the wireless, consumer, automotive, and aerospace and defense market segments calls for an accelerated pace of system innovation and collaboration,” says Lip Bu Tan, chief executive officer at Cadence. “By working even more closely with NI on this strategic alliance, we aim to deliver an integrated flow from pre-silicon mixed-signal design and verification to post-silicon validation and test, shortening the overall time to electronic product creation.”

Cadence and NI also plan to collaborate to define and build a common, connected flow enabling re-use of mixed-signal testbenches and stimulus from pre-silicon design verification to post-silicon validation and production test. Reusable test IP helps customers accelerate their time to market and reduce errors. A goal of the collaboration is to better integrate flows for analog/mixed-signal and RF ICs and modules from design to test.