Fujitsu completes post-K supercomputer CPU prototype, begins functionality trials
Fujitsu Ltd. and RIKEN recently announced that the joint development of post-K, a supercomputer that Japan’s Ministry of Education, Culture, Sports, Science and Technology (MEXT) has set forth as a successor to the K computer, is moving forward, with the goal of beginning full operations around 2021.
Fujitsu has now completed the prototype CPU chip that will serve as the core of post-K, commencing functionality field trials. With post-K, Fujitsu and RIKEN aim to create the world’s highest-performing supercomputer, capable of tackling a broad range of applications to solve problems not only in the area of science and technology, but to play a role in a wide variety of issues in society.
To realize this goal, Fujitsu has adopted the widely used Arm instruction set architecture (ISA) in the CPU, while implementing expanded instructions newly formulated for supercomputers. In addition to further enhancing the high memory bandwidth and double-precision arithmetic performance implemented in the K computer, Fujitsu has also added support for half-precision arithmetic, which remains critical to fields like AI.
Now, by verifying the initial operation of prototype CPU chips meeting these design standards, Fujitsu and RIKEN have smoothly cleared an important milestone in system development. Moving forward, Fujitsu and RIKEN will continue development with an eye toward completing post-K and commencing full operations. The post-K prototype was exhibited at ISC 2018, a significant international conference and exhibition for high performance computing.
Fujitsu and RIKEN began joint development of the K computer in 2006, which was completed and commenced full operations in 2012. The K computer continues to deliver world-leading performance on major indicators of practical supercomputer performance, operating as an indispensable R&D platform for cutting-edge research. As a successor to the K computer, post-K is also expected to simultaneously serve as a cutting-edge R&D platform for resolving a variety of scientific and society-wide issues, as well as an important platform supporting the attainment of “Society 5.0″(1), a new, human-centric society envisioned by the Japanese government. Fujitsu began basic design work with RIKEN in October 2014, undertaking co-design work with application developers in a variety of fields while pushing forward with prototyping and detailed specifications.
Development Status of Post-K
Fujitsu and RIKEN have adopted the widely used Arm architecture, envisioning utilization by a broader user base. In addition to this, Fujitsu worked with Arm to contribute to the Scalable Vector Extension (SVE) in the Armv8-A architecture, which significantly extends the vector processing capabilities for HPC systems, and adopted the results. Post-K is also expected to see expanded use in the AI field, delivering support for half-precision arithmetic, important in workloads such as deep learning, as well as the double-precision arithmetic essential for use cases including computer simulations. Now that Fujitsu has completed CPU chip prototypes and verified their initial operation, it will commence with functionality trials. Going forward, it will continue further development with RIKEN.
Overview of the Post-K System
Fujitsu and RIKEN continue to improve on the technology first introduced in the K computer, which has a proven record for availability and real-world performance, developing post-K as a supercomputer that offers top-class, real-world performance for a wide variety of application software. The CPUs, which form the core of the system, utilize the Arm8-A SVE architecture, building on the microarchitecture hardware design experience Fujitsu has cultivated through previous supercomputer development projects, including the K computer. With the memory bandwidth delivered by high performance stacked memory computational performance, the post-K system is optimized to achieve high-level, real-world application performance. Moreover, by utilizing cutting-edge semiconductor technology and by incorporating an energy-saving design and power control functionality, the CPUs deliver excellent energy savings for its performance. Fujitsu will continue to provide compatibility with the K computer in the system software for post-K, including in the program development environment. By maintaining continuity in language specifications and microarchitecture, the program assets built up for the K computer can be reliably migrated by recompiling them, which can preserve performance standards. In addition, system software developed by RIKEN, including McKernel, XcalableMP, and FDPS (“Framework for Developing Particle Simulator”), can also be used. Fujitsu anticipates that these assets will prove useful in further improving the real-world performance and convenience of the system. The Arm architecture used in post-K has been accepted by a wide range of developers and users. Joining this community will make it possible for post-K to utilize a wide range of software assets, including open source software. By simultaneously feeding back the results and technology attained through the development of post-K into the community, Fujitsu also hopes it will contribute to the creation of an ecosystem around the Arm architecture. Fujitsu and RIKEN are continuing development with the goal of generating cutting-edge research results through the use of post-K. This includes resolving scientific and society-wide issues in areas such as health and longevity, disaster prevention and mitigation, energy, and manufacturing, to effectively contribute to enhanced industrial competitiveness.
Post-K will be a system featuring world-leading capabilities in (1) energy consumption performance, (2) computational capability, (3) ease of use and convenience for users, and (4) generating groundbreaking results, surpassing other systems around the world in overall strength. Moreover, Fujitsu and RIKEN are collaboratively developing both the system and its applications, aiming for the world’s highest level of versatility, up to one hundred times the application execution performance of the K computer, and a power consumption of 30-40 MW (compared with 12.7 MW for the K computer).