Power Reduction in Digital Circuits

DatesFebruary 27 2013
CityKanata, Ontario, Canada
Location300 March Road, Suite 501
SponsorsHosted by GaN Systems
Main BodyIn spite of reduction in supply voltage and improved leakage control, power consumption has become a key performance specification/target in many electronic products – not just portable electronics. Reducing power consumption requires a broad multi-dimensional approach: system power management; energy efficient regulation; architectural optimization; on-die power management; BIG-Little processors; low-power implementation techniques (clock and power gating, multi-Vt, multi-channel libraries, leakage and dynamic power optimization), sleep modes, etc.
ScheduleStart Time: 5:30 pm

Concludes: 8:30 pm
FeesITAC Members - $45.00 + HST
Non-members - $65.00 + HST