The National Research Council of Canada’s (NRC) has released the second version of its gallium nitride (GaN) GaN500v2 Design Kit software. Combined with Canada’s only foundry for GaN electronics, the free software package enables industry and academics to create revolutionary technologies and device designs.
GaN is a revolutionary technology that impacts two major and distinct applications: high power electronics and high frequency electronics, also known as RF (radio frequency) electronics, and power electronics (e.g. inverters, rectifiers and ac-dc converters).
The NRC provides the GaN500v2 Design Kit, which describes the GaN electronics fabrication service and includes both a Design Manual and a Physical Design Kit, based on ADS software. Devices are fabricated with 0.5 micron gate length on silicon carbide substrates. The NRC provides complete fabrication processing from 3” GaN on SiC wafers through to characterization and wafer dicing.
Partners can choose full wafer runs (one customer’s designs only) or shared wafer runs, which consolidate demand on three or more fabrication runs per year. The latter service is offered in partnership with CMC Microsystems.
* Communications sector — wireless infrastructure electronics market
* Energy management sector
* Companies interested in increasing the efficiency of power supply equipment for the communications sector
Description of software
This Design Manual includes the process description and design rules for all supported devices for the gallium nitride technology and the related foundry services available through the Canadian Photonics Fabrication Centre of the National Research Council of Canada. This technology is appropriate for, but not limited to, RF and microwave devices.
The GaN500v2 Design Kit is based on the Agilent ADS CAD tool. The minimum CAD bundle required for running the kit includes the ADS core and layout module. The design kit is compatible with ADS 2014 and earlier.
The design kit supports:
* Schematic capture
* Circuit simulation
* Synchronization between the schematic and the layout
* Design rule check (DRC)
* Exporting layout