Agilent to host seminar series on high-speed digital interfaces

Leading global provider of electronic test and measurement devices Agilent Technologies Inc., will host a series of educational seminars focused on physical layer validation of high-speed digital interfaces at four cities in Canada this month.

Targeted to those involved in developing products with high-speed digital interfaces such as PCI Express, USB, or MIPI, 100G communications standards, or DDR memory interfaces, the free sessions serve to keep attendees up on the standards and how they are tested. The seminars aim to provide an overview of the latest developments in the standards and how to validate designs, as well as provide demonstrations of testing methodologies.

The seminars have been tailored to be of interest to design engineers, signal integrity engineers, quality engineers, validation engineers, test engineers, architect, project manager, program manager, application manager and application engineers.

The full-day event commences at 8:30am with registration and covers the following session tracks:

EDA Simulation for Enabling the Migration from DDR3 to DDR4

Using a Mixed Signal Oscilloscope for DDR Validation

PCIe3 Compliance – How to Successfully Navigate the Standard

Keeping Up with the 10G USB 3.1 Physical Layer Test Challenges

Practical Guide to 100G Electrical Compliance Testing

MIPI – Physical Layer Test Challenges and Solutions (Toronto only).

Seminars will be held in the following cities:

March 24 at Agilent’s offices 2250, Alfred-Nobel Blvd. in Saint-Laurent, QC

March 25 at The Marshes Golf Club in Ottawa

March 27 at Sheraton Parkway Toronto North in Richmond Hill, ON

April 2 at Hilton Metrotown Vancouver in Burnaby, BC.

To register or for more information on these Agilent seminars, go to http://bit.ly/1ebLSeU.